forked from enlightenment/efl
evas: add SSE3 support
Readme entry configure --[enable/disable]-cpu-sse3 processor capability test Patch by: Jim Kukunas <james.t.kukunas@linux.intel.com> SVN revision: 63697
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@ -416,6 +416,12 @@ ALTIVEC asm routines yet. :) arm owners will also have to rely on the c
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fallback routines as i haven't managed to come up with any arm assembly that
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actually can beat the c code (when compiled with all optimizations) in speed.
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--enable-cpu-sse3
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this enables sse3 optimizations available in the Intel Pentium4, Core, Xeon,
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and Atom processors, as well as the AMD Athlon64, Phenom, Opteron, and Turion
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processors.
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--enable-cpu-neon
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@ -1219,6 +1219,49 @@ AC_ARG_ENABLE(cpu-sse,
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]
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)
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#######################################
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## SSE3
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build_cpu_sse3="no"
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case $host_cpu in
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i*86)
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build_cpu_sse3="yes"
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;;
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x86_64)
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build_cpu_sse3="yes"
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;;
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amd64)
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build_cpu_sse3="yes"
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;;
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esac
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AC_MSG_CHECKING(whether to build sse3 code)
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AC_ARG_ENABLE(cpu-sse3,
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AS_HELP_STRING([--enable-cpu-sse3],[enable sse3 code]),
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[
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if test "x$enableval" = "xyes" ; then
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AC_MSG_RESULT(yes)
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AC_DEFINE(BUILD_SSE3, 1, [Build SSE3 Code])
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build_cpu_sse3="yes"
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else
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AC_MSG_RESULT(no)
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build_cpu_sse3="no"
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fi
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],
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[
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AC_MSG_RESULT($build_cpu_sse3)
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if test "x$build_cpu_sse3" = "xyes" ; then
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AC_DEFINE(BUILD_SSE3, 1, [Build SSE3 Code])
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fi
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]
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)
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EVAS_SSE3_CFLAGS="-msse3 "
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if test "x$build_cpu_sse3" = "xyes" ; then
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CFLAGS="${CFLAGS} ${EVAS_SSE3_CFLAGS}"
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fi
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AC_SUBST(CFLAGS)
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#######################################
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## ALTIVEC
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build_cpu_altivec="no"
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@ -1883,6 +1926,7 @@ echo "CPU Specific Extensions:"
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echo " Fallback C Code.........: $build_cpu_c"
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echo " MMX.....................: $build_cpu_mmx"
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echo " SSE.....................: $build_cpu_sse"
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echo " SSE3....................: $build_cpu_sse3"
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echo " ALTIVEC.................: $build_cpu_altivec"
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echo " NEON....................: $build_cpu_neon"
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echo " Thread Support..........: $build_pthreads"
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@ -3,6 +3,10 @@
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#include "evas_mmx.h"
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#endif
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#if defined BUILD_SSE3
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#include <immintrin.h>
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#endif
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#if defined (HAVE_STRUCT_SIGACTION) && defined (HAVE_SIGLONGJMP)
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#include <signal.h>
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#include <setjmp.h>
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@ -60,6 +64,16 @@ evas_common_cpu_sse_test(void)
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#endif
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}
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void
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evas_common_cpu_sse3_test(void)
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{
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#ifdef BUILD_SSE3
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int data[4];
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__m128i val = _mm_lddqu_si128((__m128i *)data);
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#endif
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}
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void
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evas_common_cpu_altivec_test(void)
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{
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@ -154,6 +168,13 @@ evas_common_cpu_init(void)
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evas_common_cpu_end_opt();
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if (getenv("EVAS_CPU_NO_SSE"))
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cpu_feature_mask &= ~CPU_FEATURE_SSE;
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#ifdef BUILD_SSE3
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cpu_feature_mask |= CPU_FEATURE_SSE3 *
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evas_common_cpu_feature_test(evas_common_cpu_sse3_test);
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evas_common_cpu_end_opt();
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if(getenv("EVAS_CPU_NO_SSE3"))
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cpu_feature_mask &= ~CPU_FEATURE_SSE3;
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#endif /* BUILD_SSE3 */
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#endif /* BUILD_SSE */
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#endif /* BUILD_MMX */
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#ifdef __POWERPC__
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@ -67,8 +67,10 @@
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#define CPU_SSE2 4
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/* cpu flags count */
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#define CPU_NEON 5
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/* CPU SSE3 */
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#define CPU_SSE3 6
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/* cpu flags count */
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#define CPU_LAST 6
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#define CPU_LAST 7
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/* some useful constants */
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@ -458,7 +458,8 @@ typedef enum _CPU_Features
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CPU_FEATURE_ALTIVEC = (1 << 3),
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CPU_FEATURE_VIS = (1 << 4),
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CPU_FEATURE_VIS2 = (1 << 5),
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CPU_FEATURE_NEON = (1 << 6)
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CPU_FEATURE_NEON = (1 << 6),
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CPU_FEATURE_SSE3 = (1 << 7)
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} CPU_Features;
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typedef enum _Font_Hint_Flags
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@ -43,6 +43,7 @@
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/*#define BUILD_MMX*/
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/*#define BUILD_SSE*/
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/*#define BUILD_SSE3*/
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/*#define BUILD_C*/
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/*#define BUILD_LOADER_PNG*/
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@ -54,12 +55,14 @@
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/* check in that the user configured it right */
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#ifndef BUILD_MMX
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# ifndef BUILD_SSE3
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# ifndef BUILD_SSE
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# ifndef BUILD_C
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# error "Please Read the README"
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#endif
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# endif
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# endif
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#endif
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#define DIRECT_SCALE
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