2013-06-20 03:53:29 -07:00
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#include "evas_common_private.h"
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2015-04-15 08:21:33 -07:00
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#ifdef BUILD_NEON
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2018-11-07 10:01:48 -08:00
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# ifdef BUILD_NEON_INTRINSICS
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# include <arm_neon.h>
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# endif
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2015-04-15 08:21:33 -07:00
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#endif
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2011-09-29 19:35:31 -07:00
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2018-06-22 11:18:43 -07:00
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static int cpu_feature_mask = 0;
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#ifdef BUILD_ALTIVEC
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# ifdef __POWERPC__
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# ifdef __VEC__
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# define NEED_FEATURE_TEST
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# endif
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# endif
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#endif
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2018-11-07 10:01:48 -08:00
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2018-06-22 11:18:43 -07:00
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#ifdef __SPARC__
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# define NEED_FEATURE_TEST
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#endif
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2018-11-07 10:01:48 -08:00
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2018-06-22 11:18:43 -07:00
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#if defined(__ARM_ARCH__)
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# ifdef BUILD_NEON
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2018-11-07 10:01:48 -08:00
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# define NEED_FEATURE_TEST
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2018-06-22 11:18:43 -07:00
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# endif
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#endif
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#ifdef NEED_FEATURE_TEST
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2018-11-07 10:01:48 -08:00
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# ifdef HAVE_SIGLONGJMP
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# include <signal.h>
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# include <setjmp.h>
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# include <errno.h>
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2004-04-18 18:27:37 -07:00
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2005-04-03 08:48:47 -07:00
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static sigjmp_buf detect_buf;
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2003-09-19 21:42:45 -07:00
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static void evas_common_cpu_catch_ill(int sig);
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2005-04-03 08:31:35 -07:00
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static void evas_common_cpu_catch_segv(int sig);
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2003-09-19 21:42:45 -07:00
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static void
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2012-11-04 03:51:42 -08:00
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evas_common_cpu_catch_ill(int sig EINA_UNUSED)
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2003-03-10 20:39:58 -08:00
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{
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2004-04-18 18:27:37 -07:00
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siglongjmp(detect_buf, 1);
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2003-03-10 20:39:58 -08:00
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}
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2005-04-03 08:31:35 -07:00
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static void
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2012-11-04 03:51:42 -08:00
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evas_common_cpu_catch_segv(int sig EINA_UNUSED)
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2005-04-03 08:31:35 -07:00
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{
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2005-04-03 08:48:47 -07:00
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siglongjmp(detect_buf, 1);
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2005-04-03 08:31:35 -07:00
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}
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2018-11-07 10:01:48 -08:00
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# endif
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2003-03-10 20:39:58 -08:00
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2018-11-07 10:01:48 -08:00
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# ifdef BUILD_ALTIVEC
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2003-03-10 20:39:58 -08:00
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void
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evas_common_cpu_altivec_test(void)
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{
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2018-11-07 10:01:48 -08:00
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# ifdef __POWERPC__
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# ifdef __VEC__
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2003-03-10 20:39:58 -08:00
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vector unsigned int zero;
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2005-05-21 19:49:50 -07:00
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2003-03-10 20:39:58 -08:00
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zero = vec_splat_u32(0);
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2018-11-07 10:01:48 -08:00
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# endif /* __VEC__ */
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# endif /* __POWERPC__ */
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2005-03-27 18:27:16 -08:00
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}
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2018-11-07 10:01:48 -08:00
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# endif /* BUILD_ALTIVEC */
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2003-03-10 20:39:58 -08:00
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2009-03-13 23:48:25 -07:00
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void
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evas_common_cpu_neon_test(void)
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{
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2010-04-15 17:13:46 -07:00
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//#if defined(__ARM_ARCH__) && (__ARM_ARCH__ >= 70)
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2018-11-07 10:01:48 -08:00
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# ifdef BUILD_NEON
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# ifdef BUILD_NEON_INTRINSICS
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2015-04-15 08:21:33 -07:00
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volatile uint32x4_t temp = vdupq_n_u32(0x1);
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2018-11-07 10:01:48 -08:00
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# else
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2009-03-13 23:48:25 -07:00
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asm volatile (
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2010-12-05 17:50:32 -08:00
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".fpu neon \n\t"
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2009-03-13 23:48:25 -07:00
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"vqadd.u8 d0, d1, d0\n"
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2010-12-12 19:56:53 -08:00
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: /* Out */
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: /* In */
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: /* Clobbered */
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"d0", "d1"
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2009-03-13 23:48:25 -07:00
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);
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2018-11-07 10:01:48 -08:00
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# endif
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# endif
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2010-04-15 17:13:46 -07:00
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//#endif
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2009-03-13 23:48:25 -07:00
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}
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2003-03-10 20:39:58 -08:00
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void
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evas_common_cpu_vis_test(void)
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{
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2018-11-07 10:01:48 -08:00
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# ifdef __SPARC__
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# endif /* __SPARC__ */
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2005-03-27 18:27:16 -08:00
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}
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2018-06-22 11:18:43 -07:00
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#endif /* NEED_FEATURE_TEST */
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2018-11-07 10:01:48 -08:00
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#if defined(BUILD_MMX) || defined(BUILD_SSE3)
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# define NEED_CPU_CHECK
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#endif
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#ifdef NEED_FEATURE_TEST
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# ifndef HAVE_SIGLONGJMP
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# undef NEED_CPU_CHECK
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# define NEED_CPU_CHECK
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# endif
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#endif
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#ifdef NEED_CPU_CHECK
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2018-06-18 13:12:36 -07:00
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static Eina_Bool
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_cpu_check(Eina_Cpu_Features f)
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{
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Eina_Cpu_Features features;
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features = eina_cpu_features_get();
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return (features & f) == f;
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}
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2018-11-07 10:01:48 -08:00
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#endif
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2018-06-22 11:18:43 -07:00
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#ifdef NEED_FEATURE_TEST
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2003-03-10 20:39:58 -08:00
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int
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evas_common_cpu_feature_test(void (*feature)(void))
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{
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2018-11-07 10:01:48 -08:00
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# ifdef HAVE_SIGLONGJMP
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2003-03-10 20:39:58 -08:00
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int enabled = 1;
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2005-04-03 08:31:35 -07:00
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struct sigaction act, oact, oact2;
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2003-03-10 20:39:58 -08:00
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2003-09-19 21:42:45 -07:00
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act.sa_handler = evas_common_cpu_catch_ill;
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act.sa_flags = SA_RESTART;
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sigemptyset(&act.sa_mask);
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2003-03-10 20:39:58 -08:00
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sigaction(SIGILL, &act, &oact);
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2005-05-21 19:49:50 -07:00
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2005-04-03 08:31:35 -07:00
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act.sa_handler = evas_common_cpu_catch_segv;
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act.sa_flags = SA_RESTART;
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sigemptyset(&act.sa_mask);
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sigaction(SIGSEGV, &act, &oact2);
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2005-05-21 19:49:50 -07:00
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2005-04-03 08:48:47 -07:00
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if (sigsetjmp(detect_buf, 1))
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2005-04-03 08:31:35 -07:00
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{
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2018-11-07 10:01:48 -08:00
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sigaction(SIGILL, &oact, NULL);
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sigaction(SIGSEGV, &oact2, NULL);
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return 0;
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2005-04-03 08:31:35 -07:00
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}
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2005-05-21 19:49:50 -07:00
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2003-09-19 21:42:45 -07:00
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feature();
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2005-05-21 19:49:50 -07:00
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2003-03-10 20:39:58 -08:00
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sigaction(SIGILL, &oact, NULL);
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2005-04-03 08:31:35 -07:00
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sigaction(SIGSEGV, &oact2, NULL);
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2003-03-10 20:39:58 -08:00
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return enabled;
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2018-11-07 10:01:48 -08:00
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# else
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# ifdef BUILD_MMX
|
2012-10-13 07:07:58 -07:00
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if (feature == evas_common_cpu_mmx_test)
|
2018-06-18 13:12:36 -07:00
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return _cpu_check(EINA_CPU_MMX);
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2012-10-13 07:07:58 -07:00
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/* no mmx2 support in eina */
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if (feature == evas_common_cpu_sse_test)
|
2018-06-18 13:12:36 -07:00
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return _cpu_check(EINA_CPU_SSE);
|
2018-11-07 10:01:48 -08:00
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# endif
|
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# ifdef BUILD_SSE3
|
2012-10-13 07:07:58 -07:00
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if (feature == evas_common_cpu_sse3_test)
|
2018-06-18 13:12:36 -07:00
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return _cpu_check(EINA_CPU_SSE3);
|
2018-11-07 10:01:48 -08:00
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# endif
|
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# ifdef BUILD_ALTIVEC
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if (feature == evas_common_cpu_altivec_test)
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return _cpu_check(CPU_FEATURE_ALTIVEC);
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# endif
|
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# ifdef BUILD_NEON
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if (feature == evas_common_cpu_neon_test)
|
|
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|
return _cpu_check(EINA_CPU_NEON);
|
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# endif
|
2004-10-20 09:36:12 -07:00
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|
return 0;
|
2018-11-07 10:01:48 -08:00
|
|
|
# endif
|
2003-03-10 20:39:58 -08:00
|
|
|
}
|
2018-06-22 11:18:43 -07:00
|
|
|
#endif
|
2003-03-10 20:39:58 -08:00
|
|
|
|
2006-09-06 00:33:40 -07:00
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|
EAPI void
|
2002-11-13 21:38:10 -08:00
|
|
|
evas_common_cpu_init(void)
|
2002-11-08 00:02:15 -08:00
|
|
|
{
|
2003-03-10 20:56:46 -08:00
|
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|
static int called = 0;
|
2003-03-10 20:39:58 -08:00
|
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|
2003-03-10 20:56:46 -08:00
|
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|
if (called) return;
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|
called = 1;
|
2003-06-10 07:52:16 -07:00
|
|
|
#ifdef BUILD_MMX
|
2009-01-21 19:21:04 -08:00
|
|
|
if (getenv("EVAS_CPU_NO_MMX"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_MMX;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
evas_cpu: Avoid SIGILL in evas startup on x86
Summary:
To determine if a system supports SIMD instructions, the cpuid facility
should be used. However, for 15+ years EFL has been trapping SIGILL,
then attempting to execute these intstructions.
Continuing after SIGILL is explicitly undefined behaviour and can never
safely be relied upon - it is possible the CPU will respond to the
unknown instruction in an upredictable way and the program will not
continue correctly. Even if it hasn't caused problems before, there's
no reason to believe a processor released in the future won't behave
differently.
Lately we've had a couple of bug tickets where SIGILL appears to cause
problems at a system level as well, but there seems little point in
chasing those problems down as we shouldn't even be doing this in the
first place.
ref T6711
ref T6989
We still rely on SIGILL in a few configurations where eina_cpu doesn't
know how to query features properly (powerpc, sparc, and non linux
ARM configurations). Hopefully someone with expertise on those
platforms can follow up and we can remove this entirely.
Note: MMX2 appears to not really be a thing, and is instead provided by
both 3DNow! and SSE. We already conflate it with SSE in other parts of
evas, so I've just used SSE here to test for its presence.
Depends on D6313
Reviewers: devilhorns, zmike
Reviewed By: zmike
Subscribers: cedric, #committers, zmike
Tags: #efl
Maniphest Tasks: T6989, T6711
Differential Revision: https://phab.enlightenment.org/D6314
2018-06-18 13:12:41 -07:00
|
|
|
cpu_feature_mask |= _cpu_check(EINA_CPU_MMX) * CPU_FEATURE_MMX;
|
2009-01-21 19:21:04 -08:00
|
|
|
if (getenv("EVAS_CPU_NO_MMX2"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_MMX2;
|
evas_cpu: Avoid SIGILL in evas startup on x86
Summary:
To determine if a system supports SIMD instructions, the cpuid facility
should be used. However, for 15+ years EFL has been trapping SIGILL,
then attempting to execute these intstructions.
Continuing after SIGILL is explicitly undefined behaviour and can never
safely be relied upon - it is possible the CPU will respond to the
unknown instruction in an upredictable way and the program will not
continue correctly. Even if it hasn't caused problems before, there's
no reason to believe a processor released in the future won't behave
differently.
Lately we've had a couple of bug tickets where SIGILL appears to cause
problems at a system level as well, but there seems little point in
chasing those problems down as we shouldn't even be doing this in the
first place.
ref T6711
ref T6989
We still rely on SIGILL in a few configurations where eina_cpu doesn't
know how to query features properly (powerpc, sparc, and non linux
ARM configurations). Hopefully someone with expertise on those
platforms can follow up and we can remove this entirely.
Note: MMX2 appears to not really be a thing, and is instead provided by
both 3DNow! and SSE. We already conflate it with SSE in other parts of
evas, so I've just used SSE here to test for its presence.
Depends on D6313
Reviewers: devilhorns, zmike
Reviewed By: zmike
Subscribers: cedric, #committers, zmike
Tags: #efl
Maniphest Tasks: T6989, T6711
Differential Revision: https://phab.enlightenment.org/D6314
2018-06-18 13:12:41 -07:00
|
|
|
else /* It seems "MMX2" is actually part of SSE (and 3DNow)? */
|
|
|
|
cpu_feature_mask |= _cpu_check(EINA_CPU_SSE) * CPU_FEATURE_MMX2;
|
2009-01-21 19:21:04 -08:00
|
|
|
if (getenv("EVAS_CPU_NO_SSE"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_SSE;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
evas_cpu: Avoid SIGILL in evas startup on x86
Summary:
To determine if a system supports SIMD instructions, the cpuid facility
should be used. However, for 15+ years EFL has been trapping SIGILL,
then attempting to execute these intstructions.
Continuing after SIGILL is explicitly undefined behaviour and can never
safely be relied upon - it is possible the CPU will respond to the
unknown instruction in an upredictable way and the program will not
continue correctly. Even if it hasn't caused problems before, there's
no reason to believe a processor released in the future won't behave
differently.
Lately we've had a couple of bug tickets where SIGILL appears to cause
problems at a system level as well, but there seems little point in
chasing those problems down as we shouldn't even be doing this in the
first place.
ref T6711
ref T6989
We still rely on SIGILL in a few configurations where eina_cpu doesn't
know how to query features properly (powerpc, sparc, and non linux
ARM configurations). Hopefully someone with expertise on those
platforms can follow up and we can remove this entirely.
Note: MMX2 appears to not really be a thing, and is instead provided by
both 3DNow! and SSE. We already conflate it with SSE in other parts of
evas, so I've just used SSE here to test for its presence.
Depends on D6313
Reviewers: devilhorns, zmike
Reviewed By: zmike
Subscribers: cedric, #committers, zmike
Tags: #efl
Maniphest Tasks: T6989, T6711
Differential Revision: https://phab.enlightenment.org/D6314
2018-06-18 13:12:41 -07:00
|
|
|
cpu_feature_mask |= _cpu_check(EINA_CPU_SSE) * CPU_FEATURE_SSE;
|
2012-10-15 21:00:18 -07:00
|
|
|
# ifdef BUILD_SSE3
|
2011-10-02 03:43:17 -07:00
|
|
|
if (getenv("EVAS_CPU_NO_SSE3"))
|
evas_cpu: Avoid SIGILL in evas startup on x86
Summary:
To determine if a system supports SIMD instructions, the cpuid facility
should be used. However, for 15+ years EFL has been trapping SIGILL,
then attempting to execute these intstructions.
Continuing after SIGILL is explicitly undefined behaviour and can never
safely be relied upon - it is possible the CPU will respond to the
unknown instruction in an upredictable way and the program will not
continue correctly. Even if it hasn't caused problems before, there's
no reason to believe a processor released in the future won't behave
differently.
Lately we've had a couple of bug tickets where SIGILL appears to cause
problems at a system level as well, but there seems little point in
chasing those problems down as we shouldn't even be doing this in the
first place.
ref T6711
ref T6989
We still rely on SIGILL in a few configurations where eina_cpu doesn't
know how to query features properly (powerpc, sparc, and non linux
ARM configurations). Hopefully someone with expertise on those
platforms can follow up and we can remove this entirely.
Note: MMX2 appears to not really be a thing, and is instead provided by
both 3DNow! and SSE. We already conflate it with SSE in other parts of
evas, so I've just used SSE here to test for its presence.
Depends on D6313
Reviewers: devilhorns, zmike
Reviewed By: zmike
Subscribers: cedric, #committers, zmike
Tags: #efl
Maniphest Tasks: T6989, T6711
Differential Revision: https://phab.enlightenment.org/D6314
2018-06-18 13:12:41 -07:00
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_SSE3;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
evas_cpu: Avoid SIGILL in evas startup on x86
Summary:
To determine if a system supports SIMD instructions, the cpuid facility
should be used. However, for 15+ years EFL has been trapping SIGILL,
then attempting to execute these intstructions.
Continuing after SIGILL is explicitly undefined behaviour and can never
safely be relied upon - it is possible the CPU will respond to the
unknown instruction in an upredictable way and the program will not
continue correctly. Even if it hasn't caused problems before, there's
no reason to believe a processor released in the future won't behave
differently.
Lately we've had a couple of bug tickets where SIGILL appears to cause
problems at a system level as well, but there seems little point in
chasing those problems down as we shouldn't even be doing this in the
first place.
ref T6711
ref T6989
We still rely on SIGILL in a few configurations where eina_cpu doesn't
know how to query features properly (powerpc, sparc, and non linux
ARM configurations). Hopefully someone with expertise on those
platforms can follow up and we can remove this entirely.
Note: MMX2 appears to not really be a thing, and is instead provided by
both 3DNow! and SSE. We already conflate it with SSE in other parts of
evas, so I've just used SSE here to test for its presence.
Depends on D6313
Reviewers: devilhorns, zmike
Reviewed By: zmike
Subscribers: cedric, #committers, zmike
Tags: #efl
Maniphest Tasks: T6989, T6711
Differential Revision: https://phab.enlightenment.org/D6314
2018-06-18 13:12:41 -07:00
|
|
|
cpu_feature_mask |= _cpu_check(EINA_CPU_SSE3) * CPU_FEATURE_SSE3;
|
2012-10-15 21:00:18 -07:00
|
|
|
# endif /* BUILD_SSE3 */
|
2003-06-10 07:52:16 -07:00
|
|
|
#endif /* BUILD_MMX */
|
2018-11-07 10:01:48 -08:00
|
|
|
|
2012-01-07 23:22:01 -08:00
|
|
|
#ifdef BUILD_ALTIVEC
|
2012-10-15 21:00:18 -07:00
|
|
|
# ifdef __POWERPC__
|
|
|
|
# ifdef __VEC__
|
2009-01-21 19:21:04 -08:00
|
|
|
if (getenv("EVAS_CPU_NO_ALTIVEC"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_ALTIVEC;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
|
|
|
{
|
|
|
|
cpu_feature_mask |= CPU_FEATURE_ALTIVEC *
|
|
|
|
evas_common_cpu_feature_test(evas_common_cpu_altivec_test);
|
|
|
|
evas_common_cpu_end_opt();
|
|
|
|
}
|
2012-10-15 21:00:18 -07:00
|
|
|
# endif /* __VEC__ */
|
|
|
|
# endif /* __POWERPC__ */
|
2012-01-07 23:22:01 -08:00
|
|
|
#endif /* BUILD_ALTIVEC */
|
2018-11-07 10:01:48 -08:00
|
|
|
|
2003-03-10 20:39:58 -08:00
|
|
|
#ifdef __SPARC__
|
2009-01-21 19:21:04 -08:00
|
|
|
if (getenv("EVAS_CPU_NO_VIS"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_VIS;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
|
|
|
{
|
|
|
|
cpu_feature_mask |= CPU_FEATURE_VIS *
|
|
|
|
evas_common_cpu_feature_test(evas_common_cpu_vis_test);
|
|
|
|
evas_common_cpu_end_opt();
|
|
|
|
}
|
2003-09-19 21:42:45 -07:00
|
|
|
#endif /* __SPARC__ */
|
2018-11-07 10:01:48 -08:00
|
|
|
|
2010-12-05 23:53:33 -08:00
|
|
|
#if defined(__ARM_ARCH__)
|
2012-10-15 21:00:18 -07:00
|
|
|
# ifdef BUILD_NEON
|
2010-07-15 10:58:38 -07:00
|
|
|
if (getenv("EVAS_CPU_NO_NEON"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_NEON;
|
2012-11-13 06:06:28 -08:00
|
|
|
else
|
|
|
|
{
|
2018-02-28 14:38:53 -08:00
|
|
|
/* On linux eina_cpu sets this up with getauxval() */
|
2018-11-07 10:01:48 -08:00
|
|
|
# if defined(HAVE_SYS_AUXV_H) && defined(HAVE_ASM_HWCAP_H) && defined(__arm__) && defined(__linux__)
|
2018-02-28 14:38:53 -08:00
|
|
|
cpu_feature_mask |= CPU_FEATURE_NEON *
|
|
|
|
!!(eina_cpu_features_get() & EINA_CPU_NEON);
|
2018-11-07 10:01:48 -08:00
|
|
|
# else
|
2012-11-13 06:06:28 -08:00
|
|
|
cpu_feature_mask |= CPU_FEATURE_NEON *
|
|
|
|
evas_common_cpu_feature_test(evas_common_cpu_neon_test);
|
|
|
|
evas_common_cpu_end_opt();
|
2018-11-07 10:01:48 -08:00
|
|
|
# endif
|
2012-11-13 06:06:28 -08:00
|
|
|
}
|
2012-10-15 21:00:18 -07:00
|
|
|
# endif
|
2009-03-13 23:48:25 -07:00
|
|
|
#endif
|
2018-11-07 10:01:48 -08:00
|
|
|
|
|
|
|
#if defined(__aarch64__)
|
|
|
|
if (getenv("EVAS_CPU_NO_NEON"))
|
|
|
|
cpu_feature_mask &= ~CPU_FEATURE_NEON;
|
|
|
|
else
|
|
|
|
cpu_feature_mask |= CPU_FEATURE_NEON;
|
|
|
|
#endif
|
2003-03-10 20:39:58 -08:00
|
|
|
}
|
|
|
|
|
2003-12-09 20:10:55 -08:00
|
|
|
int
|
2003-03-10 20:39:58 -08:00
|
|
|
evas_common_cpu_has_feature(unsigned int feature)
|
|
|
|
{
|
2003-03-10 20:59:49 -08:00
|
|
|
return (cpu_feature_mask & feature);
|
2002-11-08 00:02:15 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2002-11-13 21:38:10 -08:00
|
|
|
evas_common_cpu_have_cpuid(void)
|
2002-11-08 00:02:15 -08:00
|
|
|
{
|
2007-05-10 09:15:02 -07:00
|
|
|
return 0;
|
2008-07-19 10:40:52 -07:00
|
|
|
/*
|
2002-11-08 00:02:15 -08:00
|
|
|
#ifdef BUILD_MMX
|
|
|
|
unsigned int have_cpu_id;
|
2005-05-21 19:49:50 -07:00
|
|
|
|
2002-11-08 00:02:15 -08:00
|
|
|
have_cpu_id = 0;
|
|
|
|
have_cpuid(have_cpu_id);
|
|
|
|
return have_cpu_id;
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
2007-05-10 09:15:02 -07:00
|
|
|
*/
|
2002-11-08 00:02:15 -08:00
|
|
|
}
|
|
|
|
|
2006-09-06 00:33:40 -07:00
|
|
|
EAPI void
|
2002-11-13 21:38:10 -08:00
|
|
|
evas_common_cpu_can_do(int *mmx, int *sse, int *sse2)
|
2002-11-08 00:02:15 -08:00
|
|
|
{
|
|
|
|
static int do_mmx = 0, do_sse = 0, do_sse2 = 0, done = 0;
|
2003-09-07 04:24:48 -07:00
|
|
|
|
|
|
|
if (!done)
|
|
|
|
{
|
2017-12-11 00:06:30 -08:00
|
|
|
if (cpu_feature_mask & CPU_FEATURE_MMX) do_mmx = 1;
|
|
|
|
if (cpu_feature_mask & CPU_FEATURE_MMX2) do_sse = 1;
|
|
|
|
if (cpu_feature_mask & CPU_FEATURE_SSE) do_sse = 1;
|
|
|
|
done = 1;
|
2002-11-08 00:02:15 -08:00
|
|
|
}
|
2017-12-11 00:06:30 -08:00
|
|
|
|
2002-11-08 00:02:15 -08:00
|
|
|
*mmx = do_mmx;
|
|
|
|
*sse = do_sse;
|
|
|
|
*sse2 = do_sse2;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef BUILD_MMX
|
2006-09-06 00:33:40 -07:00
|
|
|
EAPI void
|
2002-11-13 21:38:10 -08:00
|
|
|
evas_common_cpu_end_opt(void)
|
2002-11-08 00:02:15 -08:00
|
|
|
{
|
2012-10-15 21:00:18 -07:00
|
|
|
if (cpu_feature_mask & (CPU_FEATURE_MMX | CPU_FEATURE_MMX2))
|
2003-09-07 04:24:48 -07:00
|
|
|
{
|
|
|
|
emms();
|
|
|
|
}
|
2002-11-08 00:02:15 -08:00
|
|
|
}
|
|
|
|
#else
|
2006-09-06 00:33:40 -07:00
|
|
|
EAPI void
|
2002-11-13 21:38:10 -08:00
|
|
|
evas_common_cpu_end_opt(void)
|
2002-11-08 00:02:15 -08:00
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif
|