forked from enlightenment/efl
evas: implement _op_blend_rel_mas_c_dp_neon using NEON intrinsics
Summary: NEON intrinsics can be built both for armv7 and armv8. Reviewers: raster, cedric Reviewed By: cedric Subscribers: cedric Projects: #efl Differential Revision: https://phab.enlightenment.org/D2442 Signed-off-by: Cedric BAIL <cedric@osg.samsung.com>
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Cedric BAIL
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@ -1,8 +1,6 @@
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#ifdef BUILD_NEON
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#ifdef BUILD_NEON_INTRINSICS
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#include <arm_neon.h>
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#endif
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#endif
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#define NEONDEBUG 0
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@ -689,19 +687,144 @@ init_blend_mask_color_pt_funcs_neon(void)
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#ifdef BUILD_NEON
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static void
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_op_blend_rel_mas_c_dp_neon(DATA32 *s EINA_UNUSED, DATA8 *m, DATA32 c, DATA32 *d, int l) {
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DATA32 *e;
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int alpha;
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uint16x8_t dc0_16x8;
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uint16x8_t dc1_16x8;
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uint16x8_t m_16x8;
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uint16x8_t mc0_16x8;
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uint16x8_t mc1_16x8;
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uint16x8_t temp0_16x8;
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uint16x8_t temp1_16x8;
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uint16x8_t x255_16x8;
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uint32x2_t c_32x2;
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uint32x2_t m_32x2;
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uint32x4_t a_32x4;
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uint32x4_t ad_32x4;
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uint32x4_t cond_32x4;
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uint32x4_t d_32x4;
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uint32x4_t dc_32x4;
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uint32x4_t m_32x4;
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uint32x4_t temp_32x4;
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uint32x4_t x0_32x4;
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uint32x4_t x1_32x4;
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uint8x16_t a_8x16;
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uint8x16_t d_8x16;
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uint8x16_t dc_8x16;
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uint8x16_t m_8x16;
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uint8x16_t mc_8x16;
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uint8x16_t temp_8x16;
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uint8x16_t x0_8x16;
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uint8x16_t x1_8x16;
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uint8x8_t a0_8x8;
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uint8x8_t a1_8x8;
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uint8x8_t c_8x8;
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uint8x8_t d0_8x8;
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uint8x8_t d1_8x8;
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uint8x8_t dc0_8x8;
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uint8x8_t dc1_8x8;
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uint8x8_t m0_8x8;
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uint8x8_t m1_8x8;
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uint8x8_t m_8x8;
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uint8x8_t mc0_8x8;
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uint8x8_t mc1_8x8;
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uint8x8_t temp0_8x8;
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uint8x8_t temp1_8x8;
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DEBUG_FNCOUNT("not");
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c_32x2 = vdup_n_u32(c);
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c_8x8 = vreinterpret_u8_u32(c_32x2);
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x1_8x16 = vdupq_n_u8(0x1);
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x1_32x4 = vreinterpretq_u32_u8(x1_8x16);
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x255_16x8 = vdupq_n_u16(0xff);
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x0_8x16 = vdupq_n_u8(0x0);
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x0_32x4 = vreinterpretq_u32_u8(x0_8x16);
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UNROLL8_PLD_WHILE(d, l, e,
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{
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DATA32 mc = MUL_SYM(*m, c);
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alpha = 256 - (mc >> 24);
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*d = MUL_SYM(*d >> 24, mc) + MUL_256(alpha, *d);
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d++;
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m++;
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});
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DATA32 *end = d + (l & ~3);
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while (d < end)
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{
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// load 4 elements from d
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d_32x4 = vld1q_u32(d);
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d_8x16 = vreinterpretq_u8_u32(d_32x4);
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d0_8x8 = vget_low_u8(d_8x16);
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d1_8x8 = vget_high_u8(d_8x16);
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// load 4 elements from m
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m_32x2 = vld1_lane_u32((DATA32*)m, m_32x2, 0);
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m_8x8 = vreinterpret_u8_u32(m_32x2);
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m_16x8 = vmovl_u8(m_8x8);
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m_8x16 = vreinterpretq_u8_u16(m_16x8);
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m_8x8 = vget_low_u8(m_8x16);
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m_16x8 = vmovl_u8(m_8x8);
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m_32x4 = vreinterpretq_u32_u16(m_16x8);
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m_32x4 = vmulq_u32(m_32x4, x1_32x4);
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m_8x16 = vreinterpretq_u8_u32(m_32x4);
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m0_8x8 = vget_low_u8(m_8x16);
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m1_8x8 = vget_high_u8(m_8x16);
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// multiply MUL_SYM(*m, c)
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mc0_16x8 = vmull_u8(m0_8x8, c_8x8);
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mc1_16x8 = vmull_u8(m1_8x8, c_8x8);
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mc0_16x8 = vaddq_u16(mc0_16x8, x255_16x8);
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mc1_16x8 = vaddq_u16(mc1_16x8, x255_16x8);
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mc0_8x8 = vshrn_n_u16(mc0_16x8, 8);
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mc1_8x8 = vshrn_n_u16(mc1_16x8, 8);
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mc_8x16 = vcombine_u8(mc0_8x8, mc1_8x8);
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// calculate alpha = 256 - (mc >> 24)
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a_8x16 = vsubq_u8(x0_8x16, mc_8x16);
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a_32x4 = vreinterpretq_u32_u8(a_8x16);
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a_32x4 = vshrq_n_u32(a_32x4, 24);
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a_32x4 = vmulq_u32(a_32x4, x1_32x4);
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a_8x16 = vreinterpretq_u8_u32(a_32x4);
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a0_8x8 = vget_low_u8(a_8x16);
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a1_8x8 = vget_high_u8(a_8x16);
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// multiply MUL_256(alpha, *d)
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temp0_16x8 = vmull_u8(a0_8x8, d0_8x8);
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temp1_16x8 = vmull_u8(a1_8x8, d1_8x8);
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temp0_8x8 = vshrn_n_u16(temp0_16x8,8);
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temp1_8x8 = vshrn_n_u16(temp1_16x8,8);
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temp_8x16 = vcombine_u8(temp0_8x8, temp1_8x8);
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temp_32x4 = vreinterpretq_u32_u8(temp_8x16);
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// select d where alpha == 0
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cond_32x4 = vceqq_u32(a_32x4, x0_32x4);
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ad_32x4 = vbslq_u32(cond_32x4, d_32x4, temp_32x4);
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// shift (*d >> 24)
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dc_32x4 = vshrq_n_u32(d_32x4, 24);
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dc_32x4 = vmulq_u32(x1_32x4, dc_32x4);
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dc_8x16 = vreinterpretq_u8_u32(dc_32x4);
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dc0_8x8 = vget_low_u8(dc_8x16);
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dc1_8x8 = vget_high_u8(dc_8x16);
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// multiply MUL_256(*d >> 24, sc);
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dc0_16x8 = vmull_u8(dc0_8x8, mc0_8x8);
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dc1_16x8 = vmull_u8(dc1_8x8, mc1_8x8);
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dc0_16x8 = vaddq_u16(dc0_16x8, x255_16x8);
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dc1_16x8 = vaddq_u16(dc1_16x8, x255_16x8);
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dc0_8x8 = vshrn_n_u16(dc0_16x8, 8);
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dc1_8x8 = vshrn_n_u16(dc1_16x8, 8);
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dc_8x16 = vcombine_u8(dc0_8x8, dc1_8x8);
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// add up everything
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dc_32x4 = vreinterpretq_u32_u8(dc_8x16);
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d_32x4 = vaddq_u32(dc_32x4, ad_32x4);
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// save result
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vst1q_u32(d, d_32x4);
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d+=4;
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m+=4;
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}
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end += (l & 3);
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while (d < end)
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{
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DATA32 mc = MUL_SYM(*m, c);
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int alpha = 256 - (mc >> 24);
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*d = MUL_SYM(*d >> 24, mc) + MUL_256(alpha, *d);
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d++;
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m++;
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}
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}
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#define _op_blend_rel_mas_cn_dp_neon _op_blend_rel_mas_c_dp_neon
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