forked from enlightenment/efl
295 lines
5.9 KiB
C
295 lines
5.9 KiB
C
#include "evas_common_private.h"
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#ifdef BUILD_MMX
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#include "evas_mmx.h"
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#endif
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#if defined BUILD_SSE3
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#include <immintrin.h>
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#endif
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#if defined (HAVE_STRUCT_SIGACTION) && defined (HAVE_SIGLONGJMP)
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#include <signal.h>
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#include <setjmp.h>
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#include <errno.h>
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static sigjmp_buf detect_buf;
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#endif
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static int cpu_feature_mask = 0;
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#if defined (HAVE_STRUCT_SIGACTION) && defined (HAVE_SIGLONGJMP)
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static void evas_common_cpu_catch_ill(int sig);
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static void evas_common_cpu_catch_segv(int sig);
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static void
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evas_common_cpu_catch_ill(int sig EINA_UNUSED)
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{
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siglongjmp(detect_buf, 1);
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}
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static void
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evas_common_cpu_catch_segv(int sig EINA_UNUSED)
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{
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siglongjmp(detect_buf, 1);
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}
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#endif
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void
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evas_common_cpu_mmx_test(void)
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{
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#ifdef BUILD_MMX
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pxor_r2r(mm4, mm4);
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#endif
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}
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void
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evas_common_cpu_mmx2_test(void)
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{
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#ifdef BUILD_MMX
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char data[16];
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data[0] = 0;
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mmx_r2m(movntq, mm0, data);
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data[0] = 0;
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#endif
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}
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void
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evas_common_cpu_sse_test(void)
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{
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#ifdef BUILD_MMX
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int blah[16];
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movntq_r2m(mm0, blah);
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#endif
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}
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void evas_common_op_sse3_test(void);
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void
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evas_common_cpu_sse3_test(void)
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{
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#ifdef BUILD_SSE3
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evas_common_op_sse3_test();
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#endif
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}
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#ifdef BUILD_ALTIVEC
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void
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evas_common_cpu_altivec_test(void)
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{
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#ifdef __POWERPC__
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#ifdef __VEC__
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vector unsigned int zero;
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zero = vec_splat_u32(0);
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#endif /* __VEC__ */
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#endif /* __POWERPC__ */
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}
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#endif /* BUILD_ALTIVEC */
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void
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evas_common_cpu_neon_test(void)
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{
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//#if defined(__ARM_ARCH__) && (__ARM_ARCH__ >= 70)
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#ifdef BUILD_NEON
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asm volatile (
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".fpu neon \n\t"
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"vqadd.u8 d0, d1, d0\n"
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: /* Out */
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: /* In */
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: /* Clobbered */
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"d0", "d1"
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);
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#endif
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//#endif
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}
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void
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evas_common_cpu_vis_test(void)
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{
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#ifdef __SPARC__
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#endif /* __SPARC__ */
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}
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int
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evas_common_cpu_feature_test(void (*feature)(void))
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{
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#if defined (HAVE_STRUCT_SIGACTION) && defined (HAVE_SIGLONGJMP)
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int enabled = 1;
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struct sigaction act, oact, oact2;
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act.sa_handler = evas_common_cpu_catch_ill;
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act.sa_flags = SA_RESTART;
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sigemptyset(&act.sa_mask);
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sigaction(SIGILL, &act, &oact);
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act.sa_handler = evas_common_cpu_catch_segv;
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act.sa_flags = SA_RESTART;
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sigemptyset(&act.sa_mask);
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sigaction(SIGSEGV, &act, &oact2);
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if (sigsetjmp(detect_buf, 1))
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{
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sigaction(SIGILL, &oact, NULL);
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sigaction(SIGSEGV, &oact2, NULL);
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return 0;
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}
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feature();
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sigaction(SIGILL, &oact, NULL);
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sigaction(SIGSEGV, &oact2, NULL);
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return enabled;
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#else
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Eina_Cpu_Features f;
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f = eina_cpu_features_get();
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if (feature == evas_common_cpu_mmx_test)
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return (f & EINA_CPU_MMX) == EINA_CPU_MMX;
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/* no mmx2 support in eina */
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if (feature == evas_common_cpu_sse_test)
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return (f & EINA_CPU_SSE) == EINA_CPU_SSE;
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if (feature == evas_common_cpu_sse3_test)
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return (f & EINA_CPU_SSE3) == EINA_CPU_SSE3;
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return 0;
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#endif
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}
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EAPI void
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evas_common_cpu_init(void)
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{
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static int called = 0;
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if (called) return;
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called = 1;
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#ifdef BUILD_MMX
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if (getenv("EVAS_CPU_NO_MMX"))
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cpu_feature_mask &= ~CPU_FEATURE_MMX;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_MMX *
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evas_common_cpu_feature_test(evas_common_cpu_mmx_test);
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evas_common_cpu_end_opt();
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}
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if (getenv("EVAS_CPU_NO_MMX2"))
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cpu_feature_mask &= ~CPU_FEATURE_MMX2;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_MMX2 *
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evas_common_cpu_feature_test(evas_common_cpu_mmx2_test);
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evas_common_cpu_end_opt();
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}
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if (getenv("EVAS_CPU_NO_SSE"))
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cpu_feature_mask &= ~CPU_FEATURE_SSE;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_SSE *
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evas_common_cpu_feature_test(evas_common_cpu_sse_test);
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evas_common_cpu_end_opt();
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}
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# ifdef BUILD_SSE3
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if (getenv("EVAS_CPU_NO_SSE3"))
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cpu_feature_mask &= ~CPU_FEATURE_SSE3;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_SSE3 *
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evas_common_cpu_feature_test(evas_common_cpu_sse3_test);
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evas_common_cpu_end_opt();
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}
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# endif /* BUILD_SSE3 */
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#endif /* BUILD_MMX */
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#ifdef BUILD_ALTIVEC
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# ifdef __POWERPC__
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# ifdef __VEC__
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if (getenv("EVAS_CPU_NO_ALTIVEC"))
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cpu_feature_mask &= ~CPU_FEATURE_ALTIVEC;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_ALTIVEC *
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evas_common_cpu_feature_test(evas_common_cpu_altivec_test);
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evas_common_cpu_end_opt();
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}
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# endif /* __VEC__ */
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# endif /* __POWERPC__ */
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#endif /* BUILD_ALTIVEC */
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#ifdef __SPARC__
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if (getenv("EVAS_CPU_NO_VIS"))
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cpu_feature_mask &= ~CPU_FEATURE_VIS;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_VIS *
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evas_common_cpu_feature_test(evas_common_cpu_vis_test);
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evas_common_cpu_end_opt();
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}
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#endif /* __SPARC__ */
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#if defined(__ARM_ARCH__)
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# ifdef BUILD_NEON
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if (getenv("EVAS_CPU_NO_NEON"))
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cpu_feature_mask &= ~CPU_FEATURE_NEON;
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else
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{
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cpu_feature_mask |= CPU_FEATURE_NEON *
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evas_common_cpu_feature_test(evas_common_cpu_neon_test);
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evas_common_cpu_end_opt();
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}
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# endif
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#endif
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}
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int
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evas_common_cpu_has_feature(unsigned int feature)
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{
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return (cpu_feature_mask & feature);
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}
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int
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evas_common_cpu_have_cpuid(void)
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{
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return 0;
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/*
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#ifdef BUILD_MMX
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unsigned int have_cpu_id;
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have_cpu_id = 0;
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have_cpuid(have_cpu_id);
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return have_cpu_id;
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#else
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return 0;
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#endif
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*/
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}
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EAPI void
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evas_common_cpu_can_do(int *mmx, int *sse, int *sse2)
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{
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static int do_mmx = 0, do_sse = 0, do_sse2 = 0, done = 0;
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if (!done)
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{
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if (cpu_feature_mask & CPU_FEATURE_MMX) do_mmx = 1;
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if (cpu_feature_mask & CPU_FEATURE_MMX2) do_sse = 1;
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if (cpu_feature_mask & CPU_FEATURE_SSE) do_sse = 1;
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}
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// INF("%i %i %i", do_mmx, do_sse, do_sse2);
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*mmx = do_mmx;
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*sse = do_sse;
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*sse2 = do_sse2;
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done = 1;
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}
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#ifdef BUILD_MMX
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EAPI void
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evas_common_cpu_end_opt(void)
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{
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if (cpu_feature_mask & (CPU_FEATURE_MMX | CPU_FEATURE_MMX2))
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{
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emms();
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}
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}
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#else
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EAPI void
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evas_common_cpu_end_opt(void)
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{
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}
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#endif
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