forked from enlightenment/efl
478 lines
16 KiB
C
478 lines
16 KiB
C
/* blend pixel x color --> dst */
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#ifdef BUILD_NEON
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#include <arm_neon.h>
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/* Note: Optimisation is based on keeping _dest_ aligned: else it's a pair of
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* reads, then two writes, a miss on read is 'just' two reads */
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static void
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_op_blend_p_c_dp_neon(DATA32 * __restrict s, DATA8 *m EINA_UNUSED, DATA32 c, DATA32 * __restrict d, int l) {
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#define AP "blend_p_c_dp_"
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asm volatile (
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".fpu neon\n\t"
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"vdup.u32 d0, %[c]\n\t" // Load 'c'
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"vmov.u16 q1, $0x00ff\n\t" // round_mask
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"vmov.u8 q2, #0\n\t" // zero register
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"sub %[tmp], %[e], #16\n\t"
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"cmp %[d], %[tmp]\n\t"
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"bhi "AP"skipquad\n\t"
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AP"quadloop:"
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"vld1.32 {d6, d7}, [%[s]]!\n\t" // Load 's'
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"vld1.32 {d8, d9}, [%[d]]\n\t" // Load 'd'
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"vmull.u8 q5, d6, d0\n\t" // s * c
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"vmull.u8 q6, d7, d0\n\t"
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"vadd.u16 q5, q5, q1\n\t" // rounding
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"vadd.u16 q6, q6, q1\n\t"
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"vshrn.u16 d10, q5, #8\n\t" // narrowing
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"vshrn.u16 d11, q6, #8\n\t" // sc in q5
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"vsub.u8 q6, q2, q5\n\t"
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"vmov q7, q6\n\t"
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"vtrn.u8 q7, q6\n\t"
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"vmov q7, q6\n\t"
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"vtrn.u16 q7, q6\n\t" // q6 - alpha
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"vmull.u8 q7, d8, d12\n\t"
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"vmull.u8 q8, d9, d13\n\t"
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"vshrn.u16 d14, q7, #8\n\t"
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"vshrn.u16 d15, q8, #8\n\t" // q7 - d * alpha
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"vceq.i32 q6, q6, #0\n\t" // if alpha = 0x100
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"vbsl q6, q4, q7\n\t" // just copy d[i]
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"vadd.u32 q4, q5, q6\n\t"
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"vst1.u32 {d8, d9}, [%[d]]!\n\t"
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"cmp %[d], %[tmp]\n\t"
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"bls "AP"quadloop\n\t"
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AP"skipquad:"
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"sub %[tmp], %[e], #8\n\t"
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"cmp %[d], %[tmp]\n\t"
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"bhi "AP"skipdouble\n\t"
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AP"doubleloop:"
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"vld1.32 d6, [%[s]]!\n\t"
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"vld1.32 d7, [%[d]]\n\t"
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"vmull.u8 q4, d6, d0\n\t"
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"vadd.u16 q4, q4, q1\n\t"
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"vshrn.u16 d8, q4, #8\n\t"
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"vsub.u8 d9, d4, d8\n\t"
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"vmov d10, d9\n\t"
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"vtrn.u8 d10, d9\n\t"
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"vmov d10, d9\n\t"
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"vtrn.u16 d10, d9\n\t" // d9 - alpha
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"vmull.u8 q5, d7, d9\n\t"
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"vshrn.u16 d1, q5, #8\n\t"
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"vceq.i32 d9, d9, #0\n\t"
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"vbsl d9, d7, d1\n\t" // d7 - d[i], d1 - d[i] * alpha
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"vadd.u32 d7, d8, d9\n\t"
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"vst1.u32 d7, [%[d]]!\n\t"
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"cmp %[d], %[tmp]\n\t"
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"bls "AP"doubleloop\n\t"
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AP"skipdouble:"
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"cmp %[d], %[e]\n\t"
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"beq "AP"done\n\t"
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AP"singleloop:"
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"vld1.32 d6[0], [%[s]]!\n\t"
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"vld1.32 d7[0], [%[d]]\n\t"
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"vmull.u8 q4, d6, d0\n\t"
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"vadd.u16 q4, q4, q1\n\t"
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"vshrn.u16 d8, q4, #8\n\t"
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"vsub.u8 d9, d4, d8\n\t"
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"vmov d10, d9\n\t"
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"vtrn.u8 d10, d9\n\t"
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"vmov d10, d9\n\t"
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"vtrn.u16 d10, d9\n\t" // d9 - alpha
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"vmull.u8 q5, d7, d9\n\t"
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"vshrn.u16 d1, q5, #8\n\t"
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"vceq.i32 d9, d9, #0\n\t"
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"vbsl d9, d7, d1\n\t" // d7 - d[i], d1 - d[i] * alpha
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"vadd.u32 d7, d8, d9\n\t"
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"vst1.u32 d7[0], [%[d]]!\n\t"
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"cmp %[d], %[e]\n\t"
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"blt "AP"singleloop\n\t"
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AP"done:"
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: // No output
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: [s] "r" (s), [d] "r" (d), [c] "r" (c), [e] "r" (d + l), [tmp] "r" (12)
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: "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "memory"
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);
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#undef AP
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}
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static void
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_op_blend_pan_can_dp_neon(DATA32 *s, DATA8 *m EINA_UNUSED, DATA32 c, DATA32 *d, int l) {
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DATA32 *e;
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UNROLL8_PLD_WHILE(d, l, e,
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{
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*d++ = 0xff000000 + MUL3_SYM(c, *s);
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s++;
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});
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}
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static void
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_op_blend_pan_caa_dp_neon(DATA32 *s, DATA8 *m EINA_UNUSED, DATA32 c, DATA32 *d, int l) {
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#if 1
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DATA32 *e;
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DATA32 sc;
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int alpha;
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c = 1 + (c & 0xff);
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UNROLL8_PLD_WHILE(d, l, e,
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{
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sc = MUL_256(c, *s);
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alpha = 256 - (sc >> 24);
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*d = sc + MUL_256(alpha, *d);
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d++;
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s++;
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});
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#else // the below neon is buggy!! misses rendering of spans, i think with alignment. quick - just disable this.
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#define AP "_op_blend_pan_caa_dp_"
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DATA32 *e = d + l, *tmp = (void*)73;
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asm volatile (
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".fpu neon \n\t"
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/* Set up 'c' */
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"vdup.u8 d14, %[c] \n\t"
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"vmov.i8 d15, #1 \n\t"
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"vaddl.u8 q15, d14, d15 \n\t"
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"vshr.u8 q15,#1 \n\t"
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// Pick a loop
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"andS %[tmp], %[d], $0xf \n\t"
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"beq "AP"quadstart \n\t"
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"andS %[tmp], %[d], $0x4 \n\t"
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"beq "AP"dualstart \n\t"
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AP"singleloop: \n\t"
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"vld1.32 d4[0], [%[d]] \n\t"
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"vld1.32 d0[0], [%[s]]! \n\t"
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// Long version of 'd'
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"vmovl.u8 q8, d4 \n\t"
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// Long version of 's'
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"vmovl.u8 q6, d0 \n\t"
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// d8 = s -d
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"vsub.s16 d8, d12, d16 \n\t"
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// Multiply
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"vmul.s16 d8, d8, d30 \n\t"
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// Shift down
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"vshr.s16 d8, #7 \n\t"
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// Add 'd'
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"vqadd.s16 d8, d8, d16 \n\t"
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// Shrink to save
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"vqmovun.s16 d0, q4 \n\t"
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"vst1.32 d0[0], [%[d]]! \n\t"
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// Now where?
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"andS %[tmp], %[d], $0xf \n\t"
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"beq "AP"quadstart \n\t"
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AP"dualstart: \n\t"
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// Check we have enough
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"sub %[tmp], %[e], %[d] \n\t"
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"cmp %[tmp], #16 \n\t"
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"blt "AP"loopout \n\t"
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AP"dualloop:"
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"vldm %[d], {d4} \n\t"
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"vldm %[s]!, {d0} \n\t"
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// Long version of d
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"vmovl.u8 q8, d4 \n\t"
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// Long version of s
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"vmovl.u8 q6, d0 \n\t"
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// q4/q5 = s-d
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"vsub.s16 q4, q6, q8 \n\t"
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// Multiply
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"vmul.s16 q4, q4,q15 \n\t"
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// Shift down
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"vshr.s16 q4, #7 \n\t"
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// Add d
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"vqadd.s16 q4, q4, q8 \n\t"
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// Shrink to save
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"vqmovun.s16 d0, q4 \n\t"
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"vstm %[d]!, {d0} \n\t"
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AP"quadstart: \n\t"
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"sub %[tmp], %[e], %[d] \n\t"
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"cmp %[tmp], #16 \n\t"
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"blt "AP"loopout \n\t"
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"sub %[tmp], %[e], #15 \n\t"
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AP"quadloop: \n\t"
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// load 's' -> q0, 'd' -> q2
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"vldm %[d], {d4,d5} \n\t"
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"vldm %[s]!, {d0,d1} \n\t"
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// Long version of d
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"vmovl.u8 q8, d4 \n\t"
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"vmovl.u8 q9, d5 \n\t"
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// Long version of s
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"vmovl.u8 q6, d0 \n\t"
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"vmovl.u8 q7, d1 \n\t"
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// q4/q5 = s-d
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"vsub.s16 q4, q6, q8 \n\t"
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"vsub.s16 q5, q7, q9 \n\t"
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// Multiply
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"vmul.s16 q4, q4,q15 \n\t"
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"vmul.s16 q5, q5,q15 \n\t"
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// Shift down
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"vshr.s16 q4, #7 \n\t"
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"vshr.s16 q5, #7 \n\t"
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// Add d
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"vqadd.s16 q4, q4, q8 \n\t"
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"vqadd.s16 q5, q5, q9 \n\t"
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// Shrink to save
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"vqmovun.s16 d0, q4 \n\t"
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"vqmovun.s16 d1, q5 \n\t"
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"vstm %[d]!, {d0,d1} \n\t"
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"cmp %[tmp], %[d] \n\t"
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"bhi "AP"quadloop\n\t"
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"b "AP"done\n\t"
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AP"loopout: \n\t"
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"cmp %[d], %[e] \n\t"
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"beq "AP"done\n\t"
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"sub %[tmp],%[e], %[d] \n\t"
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"cmp %[tmp],$0x04 \n\t"
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"beq "AP"singleloop2 \n\t"
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AP"dualloop2: \n\t"
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"vldm %[d], {d4} \n\t"
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"vldm %[s]!, {d0} \n\t"
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// Long version of d
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"vmovl.u8 q8, d4 \n\t"
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// Long version of s
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"vmovl.u8 q6, d0 \n\t"
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// q4/q5 = s-d
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"vsub.s16 q4, q6, q8 \n\t"
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// Multiply
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"vmul.s16 q4, q4,q15 \n\t"
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// Shift down
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"vshr.s16 q4, #7 \n\t"
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// Add d
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"vqadd.s16 q4, q4, q8 \n\t"
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// Shrink to save
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"vqmovun.s16 d0, q4 \n\t"
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"vstm %[d]!, {d0} \n\t"
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"cmp %[d], %[e] \n\t"
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"beq "AP"done \n\t"
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AP"singleloop2: \n\t"
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"vld1.32 d4[0], [%[d]] \n\t"
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"vld1.32 d0[0], [%[s]]! \n\t"
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// Long version of 'd'
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"vmovl.u8 q8, d4 \n\t"
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// Long version of 's'
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"vmovl.u8 q6, d0 \n\t"
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// d8 = s -d
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"vsub.s16 d8, d12, d16 \n\t"
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// Multiply
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"vmul.s16 d8, d8, d30 \n\t"
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// Shift down
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"vshr.s16 d8, #7 \n\t"
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// Add 'd'
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"vqadd.s16 d8, d8, d16 \n\t"
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// Shrink to save
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"vqmovun.s16 d0, q4 \n\t"
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"vst1.32 d0[0], [%[d]] \n\t"
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AP"done: \n\t"
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// No output
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:
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// Input
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: [s] "r" (s), [d] "r" (d), [e] "r" (e), [c] "r" (c), [tmp] "r" (tmp)
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// Clobbered
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: "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "memory"
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);
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#undef AP
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#endif
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}
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#define _op_blend_pas_c_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_pan_c_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_p_can_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_pas_can_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_p_caa_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_pas_caa_dp_neon _op_blend_p_c_dp_neon
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#define _op_blend_p_c_dpan_neon _op_blend_p_c_dp_neon
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#define _op_blend_pas_c_dpan_neon _op_blend_pas_c_dp_neon
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#define _op_blend_pan_c_dpan_neon _op_blend_pan_c_dp_neon
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#define _op_blend_p_can_dpan_neon _op_blend_p_can_dp_neon
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#define _op_blend_pas_can_dpan_neon _op_blend_pas_can_dp_neon
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#define _op_blend_pan_can_dpan_neon _op_blend_pan_can_dp_neon
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#define _op_blend_p_caa_dpan_neon _op_blend_p_caa_dp_neon
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#define _op_blend_pas_caa_dpan_neon _op_blend_pas_caa_dp_neon
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#define _op_blend_pan_caa_dpan_neon _op_blend_pan_caa_dp_neon
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static void
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init_blend_pixel_color_span_funcs_neon(void)
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{
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op_blend_span_funcs[SP][SM_N][SC][DP][CPU_NEON] = _op_blend_p_c_dp_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC][DP][CPU_NEON] = _op_blend_pas_c_dp_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC][DP][CPU_NEON] = _op_blend_pan_c_dp_neon;
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op_blend_span_funcs[SP][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_p_can_dp_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_pas_can_dp_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_pan_can_dp_neon;
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op_blend_span_funcs[SP][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_p_caa_dp_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_pas_caa_dp_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_pan_caa_dp_neon;
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op_blend_span_funcs[SP][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_p_c_dpan_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_pas_c_dpan_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_pan_c_dpan_neon;
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op_blend_span_funcs[SP][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_p_can_dpan_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_pas_can_dpan_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_pan_can_dpan_neon;
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op_blend_span_funcs[SP][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_p_caa_dpan_neon;
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op_blend_span_funcs[SP_AS][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_pas_caa_dpan_neon;
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op_blend_span_funcs[SP_AN][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_pan_caa_dpan_neon;
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}
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#endif
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#ifdef BUILD_NEON
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static void
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_op_blend_pt_p_c_dp_neon(DATA32 s, DATA8 m EINA_UNUSED, DATA32 c, DATA32 *d) {
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s = MUL4_SYM(c, s);
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c = 256 - (s >> 24);
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*d = s + MUL_256(c, *d);
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}
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#define _op_blend_pt_pas_c_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_c_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_p_can_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pas_can_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_can_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_p_caa_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pas_caa_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_caa_dp_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_p_c_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pas_c_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_c_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_p_can_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pas_can_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_can_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_p_caa_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pas_caa_dpan_neon _op_blend_pt_p_c_dp_neon
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#define _op_blend_pt_pan_caa_dpan_neon _op_blend_pt_p_c_dp_neon
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static void
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init_blend_pixel_color_pt_funcs_neon(void)
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{
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op_blend_pt_funcs[SP][SM_N][SC][DP][CPU_NEON] = _op_blend_pt_p_c_dp_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC][DP][CPU_NEON] = _op_blend_pt_pas_c_dp_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC][DP][CPU_NEON] = _op_blend_pt_pan_c_dp_neon;
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op_blend_pt_funcs[SP][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_pt_p_can_dp_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_pt_pas_can_dp_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC_AN][DP][CPU_NEON] = _op_blend_pt_pan_can_dp_neon;
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op_blend_pt_funcs[SP][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_pt_p_caa_dp_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_pt_pas_caa_dp_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC_AA][DP][CPU_NEON] = _op_blend_pt_pan_caa_dp_neon;
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op_blend_pt_funcs[SP][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_pt_p_c_dpan_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_pt_pas_c_dpan_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_pt_pan_c_dpan_neon;
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op_blend_pt_funcs[SP][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_pt_p_can_dpan_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_pt_pas_can_dpan_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_pt_pan_can_dpan_neon;
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op_blend_pt_funcs[SP][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_pt_p_caa_dpan_neon;
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op_blend_pt_funcs[SP_AS][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_pt_pas_caa_dpan_neon;
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op_blend_pt_funcs[SP_AN][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_pt_pan_caa_dpan_neon;
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}
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#endif
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/*-----*/
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/* blend_rel pixel x color -> dst */
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#ifdef BUILD_NEON
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#define _op_blend_rel_p_c_dpan_neon _op_blend_p_c_dpan_neon
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#define _op_blend_rel_pas_c_dpan_neon _op_blend_pas_c_dpan_neon
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#define _op_blend_rel_pan_c_dpan_neon _op_blend_pan_c_dpan_neon
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#define _op_blend_rel_p_can_dpan_neon _op_blend_p_can_dpan_neon
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#define _op_blend_rel_pas_can_dpan_neon _op_blend_pas_can_dpan_neon
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#define _op_blend_rel_pan_can_dpan_neon _op_blend_pan_can_dpan_neon
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#define _op_blend_rel_p_caa_dpan_neon _op_blend_p_caa_dpan_neon
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#define _op_blend_rel_pas_caa_dpan_neon _op_blend_pas_caa_dpan_neon
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#define _op_blend_rel_pan_caa_dpan_neon _op_blend_pan_caa_dpan_neon
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static void
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init_blend_rel_pixel_color_span_funcs_neon(void)
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{
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op_blend_rel_span_funcs[SP][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_p_c_dpan_neon;
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op_blend_rel_span_funcs[SP_AS][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_pas_c_dpan_neon;
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op_blend_rel_span_funcs[SP_AN][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_pan_c_dpan_neon;
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op_blend_rel_span_funcs[SP][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_p_can_dpan_neon;
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op_blend_rel_span_funcs[SP_AS][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_pas_can_dpan_neon;
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op_blend_rel_span_funcs[SP_AN][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_pan_can_dpan_neon;
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op_blend_rel_span_funcs[SP][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_p_caa_dpan_neon;
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op_blend_rel_span_funcs[SP_AS][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_pas_caa_dpan_neon;
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op_blend_rel_span_funcs[SP_AN][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_pan_caa_dpan_neon;
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}
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#endif
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#ifdef BUILD_NEON
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#define _op_blend_rel_pt_p_c_dpan_neon _op_blend_pt_p_c_dpan_neon
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#define _op_blend_rel_pt_pas_c_dpan_neon _op_blend_pt_pas_c_dpan_neon
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#define _op_blend_rel_pt_pan_c_dpan_neon _op_blend_pt_pan_c_dpan_neon
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#define _op_blend_rel_pt_p_can_dpan_neon _op_blend_pt_p_can_dpan_neon
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#define _op_blend_rel_pt_pas_can_dpan_neon _op_blend_pt_pas_can_dpan_neon
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#define _op_blend_rel_pt_pan_can_dpan_neon _op_blend_pt_pan_can_dpan_neon
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#define _op_blend_rel_pt_p_caa_dpan_neon _op_blend_pt_p_caa_dpan_neon
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#define _op_blend_rel_pt_pas_caa_dpan_neon _op_blend_pt_pas_caa_dpan_neon
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#define _op_blend_rel_pt_pan_caa_dpan_neon _op_blend_pt_pan_caa_dpan_neon
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static void
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init_blend_rel_pixel_color_pt_funcs_neon(void)
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{
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op_blend_rel_pt_funcs[SP][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_pt_p_c_dpan_neon;
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op_blend_rel_pt_funcs[SP_AS][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_pt_pas_c_dpan_neon;
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op_blend_rel_pt_funcs[SP_AN][SM_N][SC][DP_AN][CPU_NEON] = _op_blend_rel_pt_pan_c_dpan_neon;
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op_blend_rel_pt_funcs[SP][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_pt_p_can_dpan_neon;
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op_blend_rel_pt_funcs[SP_AS][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_pt_pas_can_dpan_neon;
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op_blend_rel_pt_funcs[SP_AN][SM_N][SC_AN][DP_AN][CPU_NEON] = _op_blend_rel_pt_pan_can_dpan_neon;
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op_blend_rel_pt_funcs[SP][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_pt_p_caa_dpan_neon;
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op_blend_rel_pt_funcs[SP_AS][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_pt_pas_caa_dpan_neon;
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op_blend_rel_pt_funcs[SP_AN][SM_N][SC_AA][DP_AN][CPU_NEON] = _op_blend_rel_pt_pan_caa_dpan_neon;
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}
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#endif
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