forked from enlightenment/efl
317 lines
9.8 KiB
C
317 lines
9.8 KiB
C
/* blend pixel x mask --> dst */
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#ifdef BUILD_SSE3
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// FIXME: These functions most likely don't perform the correct operation.
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// Test them with masks and images.
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#if 0
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static void
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_op_blend_p_mas_dp_sse3(DATA32 *s, DATA8 *m, DATA32 c, DATA32 *d, int l) {
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int alpha;
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LOOP_ALIGNED_U1_A48(d, l,
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{ /* UOP */
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alpha = *m;
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c = MUL_SYM(alpha, *s);
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alpha = 256 - (c >> 24);
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*d = c + MUL_256(alpha, *d);
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m++; s++; d++; l--;
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},
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{ /* A4OP */
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i c0 = mul_sym_sse3(m0, s0);
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__m128i a0 = sub4_alpha_sse3(c0);
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__m128i r0 = mul_256_sse3(a0, d0);
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r0 = _mm_add_epi32(r0, c0);
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_mm_store_si128((__m128i *)d, r0);
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m += 4; s += 4; d += 4; l -= 4;
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},
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{ /* A8OP */
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i s1 = _mm_lddqu_si128((__m128i *)(s+4));
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__m128i d1 = _mm_load_si128((__m128i *)(d+4));
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__m128i m1 = _mm_set_epi32(m[7], m[6], m[5], m[4]);
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__m128i c0 = mul_sym_sse3(m0, s0);
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__m128i c1 = mul_sym_sse3(m1, s1);
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__m128i a0 = sub4_alpha_sse3(c0);
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__m128i a1 = sub4_alpha_sse3(c1);
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__m128i r0 = mul_256_sse3(a0, d0);
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__m128i r1 = mul_256_sse3(a1, d1);
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r0 = _mm_add_epi32(r0, c0);
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r1 = _mm_add_epi32(r1, c1);
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_mm_store_si128((__m128i *)d, r0);
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_mm_store_si128((__m128i *)(d+4), r1);
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m += 8; s += 8; d += 8; l -= 8;
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})
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}
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static void
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_op_blend_pas_mas_dp_sse3(DATA32 *s, DATA8 *m, DATA32 c EINA_UNUSED, DATA32 *d, int l) {
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const __m128i ones = _mm_set_epi32(1, 1, 1, 1);
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int alpha;
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LOOP_ALIGNED_U1_A48(d, l,
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{ /* UOP */
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alpha = *m;
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switch(alpha)
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{
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case 0:
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break;
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case 255:
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*d = *s;
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break;
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default:
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alpha++;
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*d = INTERP_256(alpha, *s, *d);
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break;
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}
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m++; s++; d++; l--;
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},
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{ /*A4OP */
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if ((m[3] | m[2] | m[1] | m[0]) == 0) {
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m += 4; s += 4; d += 4; l -= 4;
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continue;
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}
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i zm0 = _mm_cmpeq_epi32(m0, _mm_setzero_si128());
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m0 = _mm_add_epi32(m0, ones);
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__m128i r0 = interp4_256_sse3(m0, s0, d0);
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r0 = _mm_and_si128(~zm0, r0);
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d0 = _mm_and_si128(zm0, d0);
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d0 = _mm_add_epi32(r0, d0);
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_mm_store_si128((__m128i *)d, d0);
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m += 4; s += 4; d += 4; l -= 4;
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},
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{ /* A8OP */
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if ((m[7] | m[6] | m[5] | m[4] | m[3] | m[2] | m[1] | m[0]) == 0) {
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m += 8; s += 8; d += 8; l -= 8;
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continue;
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}
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i s1 = _mm_lddqu_si128((__m128i *)(s+4));
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__m128i d1 = _mm_load_si128((__m128i *)(d+4));
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__m128i m1 = _mm_set_epi32(m[7], m[6], m[5], m[4]);
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__m128i zm0 = _mm_cmpeq_epi32(m0, _mm_setzero_si128());
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__m128i zm1 = _mm_cmpeq_epi32(m1, _mm_setzero_si128());
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m0 = _mm_add_epi32(m0, ones);
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m1 = _mm_add_epi32(m1, ones);
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__m128i r0 = interp4_256_sse3(m0, s0, d0);
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__m128i r1 = interp4_256_sse3(m1, s1, d1);
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r0 = _mm_and_si128(~zm0, r0);
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d0 = _mm_and_si128(zm0, d0);
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r1 = _mm_and_si128(~zm1, r1);
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d1 = _mm_and_si128(zm1, d1);
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d0 = _mm_add_epi32(d0, r0);
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d1 = _mm_add_epi32(d1, r1);
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_mm_store_si128((__m128i *)d, d0);
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_mm_store_si128((__m128i *)(d+4), d1);
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m += 8; s += 8; d += 8; l -= 8;
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})
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}
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#endif
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// FIXME
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#define _op_blend_p_mas_dp_sse3 NULL
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#define _op_blend_pas_mas_dp_sse3 _op_blend_p_mas_dp_sse3
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// -----
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#define _op_blend_pan_mas_dp_sse3 _op_blend_pas_mas_dp_sse3
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#define _op_blend_p_mas_dpan_sse3 _op_blend_p_mas_dp_sse3
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#define _op_blend_pas_mas_dpan_sse3 _op_blend_pas_mas_dp_sse3
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#define _op_blend_pan_mas_dpan_sse3 _op_blend_pan_mas_dp_sse3
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static void
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init_blend_pixel_mask_span_funcs_sse3(void)
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{
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op_blend_span_funcs[SP][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_p_mas_dp_sse3;
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op_blend_span_funcs[SP_AS][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_pas_mas_dp_sse3;
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op_blend_span_funcs[SP_AN][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_pan_mas_dp_sse3;
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op_blend_span_funcs[SP][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_p_mas_dpan_sse3;
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op_blend_span_funcs[SP_AS][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_pas_mas_dpan_sse3;
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op_blend_span_funcs[SP_AN][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_pan_mas_dpan_sse3;
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}
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// FIXME
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#define _op_blend_pt_p_mas_dp_sse3 NULL
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#define _op_blend_pt_pan_mas_dp_sse3 NULL
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// -----
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#define _op_blend_pt_pas_mas_dp_sse3 _op_blend_pt_p_mas_dp_sse3
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#define _op_blend_pt_p_mas_dpan_sse3 _op_blend_pt_p_mas_dp_sse3
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#define _op_blend_pt_pas_mas_dpan_sse3 _op_blend_pt_pas_mas_dp_sse3
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#define _op_blend_pt_pan_mas_dpan_sse3 _op_blend_pt_pan_mas_dp_sse3
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static void
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init_blend_pixel_mask_pt_funcs_sse3(void)
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{
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op_blend_pt_funcs[SP][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_pt_p_mas_dp_sse3;
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op_blend_pt_funcs[SP_AS][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_pt_pas_mas_dp_sse3;
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op_blend_pt_funcs[SP_AN][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_pt_pan_mas_dp_sse3;
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op_blend_pt_funcs[SP][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_pt_p_mas_dpan_sse3;
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op_blend_pt_funcs[SP_AS][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_pt_pas_mas_dpan_sse3;
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op_blend_pt_funcs[SP_AN][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_pt_pan_mas_dpan_sse3;
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}
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/*-----*/
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/* blend_rel pixel x mask -> dst */
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#if 0
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static void
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_op_blend_rel_p_mas_dp_sse3(DATA32 *s, DATA8 *m, DATA32 c, DATA32 *d, int l) {
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int alpha;
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LOOP_ALIGNED_U1_A48(d, l,
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{ /* UOP */
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c = MUL_SYM(*m, *s);
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alpha = 256 - (c >> 24);
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*d = MUL_SYM(*d >> 24, c) + MUL_256(alpha, *d);
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d++; m++; s++; l--;
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},
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{ /* A4OP */
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i c0 = mul_sym_sse3(m0, s0);
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__m128i a0 = sub4_alpha_sse3(c0);
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__m128i l0 = mul_sym_sse3(_mm_srli_epi32(d0, 24), c0);
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__m128i r0 = mul_256_sse3(a0, d0);
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d0 = _mm_add_epi32(l0, r0);
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_mm_store_si128((__m128i *)d, d0);
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d += 4; m += 4; s += 4; l -= 4;
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},
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{ /* A8OP */
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__m128i s0 = _mm_lddqu_si128((__m128i *)s);
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__m128i m0 = _mm_set_epi32(m[3], m[2], m[1], m[0]);
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__m128i d0 = _mm_load_si128((__m128i *)d);
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__m128i s1 = _mm_lddqu_si128((__m128i *)(s+4));
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__m128i m1 = _mm_set_epi32(m[7], m[6], m[5], m[4]);
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__m128i d1 = _mm_load_si128((__m128i *)(d+4));
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__m128i c0 = mul_sym_sse3(m0, s0);
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__m128i c1 = mul_sym_sse3(m1, s1);
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__m128i a0 = sub4_alpha_sse3(c0);
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__m128i a1 = sub4_alpha_sse3(c1);
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__m128i l0 = mul_sym_sse3(_mm_srli_epi32(d0, 24), c0);
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__m128i r0 = mul_256_sse3(a0, d0);
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__m128i l1 = mul_sym_sse3(_mm_srli_epi32(d1, 24), c1);
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__m128i r1 = mul_256_sse3(a1, d1);
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d0 = _mm_add_epi32(l0, r0);
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d1 = _mm_add_epi32(l1, r1);
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_mm_store_si128((__m128i *)d, d0);
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_mm_store_si128((__m128i *)(d+4), d1);
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d += 8; m += 8; s += 8; l -= 8;
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})
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}
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#else
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// FIXME
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#define _op_blend_rel_p_mas_dp_sse3 NULL
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#endif
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#define _op_blend_rel_pas_mas_dp_sse3 _op_blend_rel_p_mas_dp_sse3
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#define _op_blend_rel_pan_mas_dp_sse3 _op_blend_rel_p_mas_dp_sse3
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#define _op_blend_rel_p_mas_dpan_sse3 _op_blend_p_mas_dpan_sse3
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#define _op_blend_rel_pas_mas_dpan_sse3 _op_blend_pas_mas_dpan_sse3
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#define _op_blend_rel_pan_mas_dpan_sse3 _op_blend_pan_mas_dpan_sse3
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static void
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init_blend_rel_pixel_mask_span_funcs_sse3(void)
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{
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op_blend_rel_span_funcs[SP][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_p_mas_dp_sse3;
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op_blend_rel_span_funcs[SP_AS][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_pas_mas_dp_sse3;
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op_blend_rel_span_funcs[SP_AN][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_pan_mas_dp_sse3;
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op_blend_rel_span_funcs[SP][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_p_mas_dpan_sse3;
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op_blend_rel_span_funcs[SP_AS][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_pas_mas_dpan_sse3;
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op_blend_rel_span_funcs[SP_AN][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_pan_mas_dpan_sse3;
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}
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#define _op_blend_rel_pt_p_mas_dp_sse3 NULL
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#define _op_blend_rel_pt_pas_mas_dp_sse3 _op_blend_rel_pt_p_mas_dp_sse3
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#define _op_blend_rel_pt_pan_mas_dp_sse3 _op_blend_rel_pt_p_mas_dp_sse3
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#define _op_blend_rel_pt_p_mas_dpan_sse3 _op_blend_pt_p_mas_dpan_sse3
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#define _op_blend_rel_pt_pas_mas_dpan_sse3 _op_blend_pt_pas_mas_dpan_sse3
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#define _op_blend_rel_pt_pan_mas_dpan_sse3 _op_blend_pt_pan_mas_dpan_sse3
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static void
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init_blend_rel_pixel_mask_pt_funcs_sse3(void)
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{
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op_blend_rel_pt_funcs[SP][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_pt_p_mas_dp_sse3;
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op_blend_rel_pt_funcs[SP_AS][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_pt_pas_mas_dp_sse3;
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op_blend_rel_pt_funcs[SP_AN][SM_AS][SC_N][DP][CPU_SSE3] = _op_blend_rel_pt_pan_mas_dp_sse3;
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op_blend_rel_pt_funcs[SP][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_pt_p_mas_dpan_sse3;
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op_blend_rel_pt_funcs[SP_AS][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_pt_pas_mas_dpan_sse3;
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op_blend_rel_pt_funcs[SP_AN][SM_AS][SC_N][DP_AN][CPU_SSE3] = _op_blend_rel_pt_pan_mas_dpan_sse3;
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}
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#endif
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